Dynamic random access memory (DRAM) include volatile memory cells that may be used to store data. However, in order to maintain the stored data, the memory cells are periodically refreshed to restore the data being stored. The memory cells are typically refreshed by sequencing through groups of memory cells associated with respective refresh addresses. The refresh address may be generated internally, and the refresh operations for the memory cells corresponding to the refresh address performed in response to refresh commands.
Refreshing the memory cells consume power. In low power applications, reducing power consumption from refresh operations may be beneficial. Therefore, it may be desirable to have refresh operations that may have reduced power consumption.